www.nellsemi.com page 1 of 5 semiconductor m40t series rohs rohs triacs, 40a features applications highcurrenttriac lowthermalresistancewithclipbonding lowthermalresistanceinsulationceramic forinsulated to3package highcommutation capability main features symbol value unit i t(rms) v /v drm rrm i gt(q1) 40 a v ma 10to50 600to1200 sunbberless packagesarerohscompliant due to their clip assembly techinque, they provide asuperiorperformanceinsurgecurrenthandling capabilities. byusinganinternalceramicpad,them40t series provides voltage insulated tab (rated at 2500v ) complyingwithul standards rms . symbol i t rms ( ) rms on state current full sine wave - ( ) i tsm non repetitive surge peak on state - current full cycle t initial = 25 c) ( , j a i t 2 i t value for fusing 2 800 a s 2 di dt / critical rate of rise of on state current - i = 2xl , t ns g gt r 100 50 i gm peak gate current 4 p g av ( ) average gate power dissipation 1 p gm 10 w a s / aa unit value 400 420 f =50 hz f =60 hz t = 20 ms t = 16.7 ms t p = 10 ms f =100 hz t =125oc j t =125oc j t =125oc j t =20 s p absolute maximum ratings parameter test conditions to-3 t = 90oc c 40 t stg storage temperature range operating junction temperature range - 40 + 150 to - 40 + 125 to oc t j peak gate power dissipation (tp = 20 s) t =125oc j the snubberless concept offer suppression of rc network and it is suitable for applications such as on/off function in static relays, heating regulation, induction motor starting circuits, phase control operationinlightdimmers,motorspeedcontrollers, andsilmilar. t1 t2 g
www.nellsemi.com page 2 of 5 semiconductor rohs rohs v tm (2) max. v t0 (2) threshold voltage max. dynamic resistance max. i drm i rrm max. ma note 1: 5% . minimum l is guaranted at of l max gt gt note 2: for both polarities of a referenced to a 2 1. i = 60 a, tm t = 380 s p t = 125c j t = 25c j t = 125c j t = 125c j t = 25c j 1.55 0.85 10 10 5 vv a m ! static characteristics unit value test conditions symbol r d (2) v d drm = v v r rrm = v limits unit i gt (1) i ii iii - - v gt i ii iii - - v gd i ii iii - - i h (2) max. i iii - max. ma ii dv dt / (2) min. ( / ) di dt c (2) a ms / i l max. min. v = 12 v, r = 33 ! d l v = v , r = 3.3k ! d drm l t = 125c j i = 500 ma t i = 1.2 i g gt v = 67% v , gate open ,t = 125c d drm j without snubber, t = 125c j 50 1.3 0.2 60 80 100 1000 20 ma vv ma v/s test conditions quadrant symbol bw snubberless and logic level (3 quadrants) ( ) t oc unless otherwise specified j = 25 electrical characteristics thermal resistance r th j c ( - ) junction to case ac ( ) r th j a ( - ) junction to ambient 0.8 c/w unit value symbol 50 s copper surface under tab = . ordering information m40txxa ordering type marking package weight base q , ty delivery mode to-3 23g 50 box product selector part number voltage x x ( ) sensitivity package 800 v ma 50 m40txxa type v 1000 v v snubberless to-3 1200 v v 600 v v m40t series m40txxa
semiconductor rohs rohs www.nellsemi.com page 3 of 5 ordering information scheme triac series current voltage 40 = 40a 60 = 600v 80 = 800v package type 100 = 1000v a = soldering assembly 40 t 60 a fig.1 maximum power dissipation versus on state rms - ( ) current full cycle fig.2 on state rms current versus case - temperature ( ) full cycle 0 10 5020 30 40 p w ( ) 0 i a t rms ( ) ( ) 125 100 75 50 25 fig.3 relative variation of thermal impedance versus pulse duration. fig.4 on-state characteristics (maximum values). 1 -03 e 1 -02 e 1 -01 e 1 +00 e k z r =[ / ] th th 1 +0.3 e 1 +02 e 1 +01 e 1 +00 e 1 -01 e 1 -02 e 0 5 10 15 20 25 1 -03 e 0 5 10 15 20 30 25 i (a) t(rms) 30 35 40 180 =180 z th j c ( - ) to3p to3p(insulated) tp s( ) t max j . v v to = 0.85 r m d = 10 t t max j j = t c j =25 v v tm ( ) 1 10 100 400 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 35 45 40 i a tm ( ) 120 = 1200v m40t series m module type m = to-3 fast-on packege
semiconductor rohs rohs www.nellsemi.com page 4 of 5 0.01 i a l t(a s) tsm 2 2 ( ), 1.00 0.10 fig.7 relative variation of gate trigger, holding and latching current versus junction temperature. fig.9 relative variation of critical rate of decrease of main current versus (dv/dt)c. 0 50 100 150 200 250 1 10 100 1000 300 100 1000 10000 fig.5 surge peak on-state current versus number of cycles. 350 400 450 t ms =20 one cycle non repetitive t initial c j =25 repetitive t c c =70 number of cycles fig.6 non-repetitive surge peak on-state current for a sinusoidal pulse and corresponding value of l t. 2 t ms p ( ) i t 2 i tsm dl/dt limitation 50a/ s t initial=25c pulsewidthtp<10ms j 10.00 l l l [t ] / l ,l ,l [t =25 c] gt , , h l j gt h l j 0.0 0.5 1.0 1.5 2.0 2.5 -40 -20 0 20 40 60 80 100 120 140 t ( ) j c fig.8 relative variation of critical rate of decrease of main current versus (dv/dt)c (typical values). 0.4 0.8 1.2 1.6 2.0 ( / ) [( / ) ] / ( / ) di dt c dv dt c specified di dt c 0.1 1.0 10.0 100.0 1.8 1.4 1.0 0.6 ( / ) ( / ) dv dt c v s ( / ) [ ] / di dt c t j ( / ) [ ] di dt c t specified j 0 1 2 3 4 6 5 0 25 50 75 100 125 t ( ) j c i a tsm ( ) l & l h l l gt typical values m40t series
semiconductor rohs rohs m40t series 0.350.15 2- 4.2 0.1 ? 30.0 0.1 ?1.3(g) 3.00.3 5?1.30.2 7.950.15 9.750.3 www.nellsemi.com page 5 of 5 all dimensions in millimeters
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